As chips grow ever larger and more complex, gate count and amount of embedded memory grow dramatically. The number of clock domains is also increasing steadily. Several dozen different clocks are ...

The modern ASIC consists of millions of gates and billions of transistors that often can be operating in several domains having different voltages and clock frequencies. To avoid data loss, designers ...

Part of the hierarchical development flow is about to get a lot simpler, thanks to a new standard being created by Accellera. What is less clear is how long will it take before users see any benefit.

As chip designs grow in complexity and face tighter power constraints, depending on a single clock domain is no longer practical. Instead, most modern chips incorporate as many as dozens or even ...