For decades, process and design scaling has triggered the adoption of transformative test solutions. About twenty years ago, when at-speed test became a de-facto requirement, on-chip compression ...
Yield improvement at sub 100-nm technologies relies on the latest scan test techniques. As IC feature sizes shrink below 90 nm, in-line inspection techniques to determine yield-limiting problems ...
Cerritos, CA—Corelis, Inc. introduces ScanExpress Merge, a productivity enhancing software application that extends the use of boundary-scan tools to testing and programming multi-assembly systems ...
At Alcatel-Lucent, we test chassis-level products that provide 42 board slots on a midplane, essentially a passive backplane that accepts boards on its front and rear sides. Thirty-four of those slots ...
Boundary Scan: What Is It? Boundary scan test techniques were first discussed in the late 1980s. At the time, experts believed that the growing complexity of chips would have a serious effect on an ...
Some new design-for-test (DFT) technologies are difficult, expensive, or risky to implement but offer significant benefits. Other technologies are easy to implement but offer minor improvements. The ...
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